# 'High-NA EUV lithography is more cost-effective than low-NA EUV double patterning' **URL:** \ **Category:** Stocks A to Z\ **Tags:** asm-lithography-holdings, intel-corporation, advanced-micro-devices\ **Created:** [April 23, 2024, 6:18pm UTC](https://discussion.fool.com/t/high-na-euv-lithography-is-more-cost-effective-than-low-na-euv-double-patterning/104296 "2024-04-23T18:18:53Z")\ **Posts on this page:** 1\ **Page:** 1
**Author:** ![XMFCogitarius](https://sea2.discourse-cdn.com/motleyfoolfree/user_avatar/discussion.fool.com/xmfcogitarius/32/44857_2.png) [@XMFCogitarius](https://discussion.fool.com/u/XMFCogitarius)\ **Post date:** [April 23, 2024, 6:18pm UTC](https://discussion.fool.com/t/high-na-euv-lithography-is-more-cost-effective-than-low-na-euv-double-patterning/104296/1 "2024-04-23T18:18:53Z")
Intel weighs in on the debate about relative cost efficiency of ASML’s High-NA vs EUV : ’ High-NA EUV lithography is more cost-effective than low-NA EUV double patterning for chip layers with the smallest features, according to Intel’s Director of Lithography Hardware and Solutions Mark Phillips. “If you use it for the things that it was designed to do, and you’ve had enough confidence that it was going to stay on schedule to plan your process to take advantage of them, then yes, high-NA certainly is cost-effective,” Phillips [told](https://www.tomshardware.com/pc-components/cpus/intel-completes-assembly-of-first-commercial-high-na-euv-chipmaking-tool-as-it-preps-for-14a-process) Tom’s Hardware.’ ’ The cost-effectiveness of high-NA EUV lithography [was called into question](https://bits-chips.nl/artikel/is-intels-early-adoption-of-high-na-euv-lithography-a-mistake/) by Semianalysis. The market research firm argued that high-NA required such high doses of EUV light that throughput was compromised to the point that low-NA EUV double patterning is more cost-effective. [https://bits-chips.nl/artikel/intel-speaks-out-on-high-na-cost-concerns/](https://bits-chips.nl/artikel/intel-speaks-out-on-high-na-cost-concerns/)