I just linked the first three I saw. There are over 7,000 patents matching “nanotube heatsink cpu”. Thanks for giving away your completely unique patent idea.
I’m retired, and due to fibromyalgia, I’m not likely to do the due diligence on anything. At MITRE and at my other jobs before, I figured that once a year or so I had a eureka moment that paid my salary perhaps for decades. There is one idea that I should probably publish now, but at the time it was classified as SECRET with I think one compartment added. Basically, it solved the assignment problem for SDI, but I came up with it when working on the AWACS radar upgrade. That’s probably as far as I should go without checking with MITRE.
Anyway, if you followed my logic, the patent/trade secret that you could get and protect is for an alloy with added nanotubes. Someone may have patented the basic idea, and the patent may have even expired. You could easily protect a different alloy, and possibly the mixing process. Is it out there? I doubt it. Getting even a ten degree drop in temperature for high-end CPUs for even a dollar or so more cost for the heat spreader would be something that every major GPU and CPU would do.
The problem with the patents you showed is that they involve one or more additional process steps for manufacturing the chip. Even a one percent failure rate for those steps would be unacceptable.* This idea would keep the failures, if any, in the manufacturing process for the heat spreader. Attaching it to the chip would be done the same way as at present.
Hmmm. Another light bulb just turned on. I’m worrying about finding an alloy melting point low enough for the nanotubes to survive but high enough that it doesn’t melt, flow, or bend in use. Make it in two layers. The top layer is structural at operating temperatures, and the bottom is a thin layer of the alloy being used between the chip and the heat spreader. Think of it as tinning, and it might even be a few microns of pure tin. 
This could lower the temperature resistance further.
- When upgrading the GEODSS system, Lincoln Labs (officially, we were co-located at Hanscom) used CMP to thin 6-inch (15 cm) wafer scale CCDs so that they could be flipped over and the camera would not have to worry about the copper interconnects blocking light. The yields of this added step were about 50%. But we only needed nine working wafers, plus a spare or two.