I always appreciate the technical breakdown Robert brings even if I don’t understand the technical jargon…doc
I’ll try to keep the technical jargon under control in this post, but it will be hard. First, the news of the day is that AMD announced the 7000-series Zen 4 desktops–to ship in Fall 2022. Is AMD Osbourning itself? Not really. AMD mainstream to high-end laptops are already trickling out, and there should be a flood by the back-to-school season. Since AMD is refreshing their CPU/APU lineup top to bottom this year, I put all the announcements in one place:
These are the new products announced in March to ship in April: https://www.anandtech.com/show/17313/ryzen-7-5800x3d-launche… This included three APUs, one in the 5000 series, the other two are Zen 2 (4000 series) products. And of course, the 5800x3d
Next, AMD announced the (mostly) Zen 3+ Rembrandt products. Zen 3+ is a 6 nm product from TSMC, compared to Zen 3’s 7 nm: https://www.xda-developers.com/amd-ryzen-6000/ These are starting to appear for sale, and there should be a flood of Rembrandt products well before back-to-school. Note that these laptops are not Zen 4, they are Zen 3+ but still require DDR5 family memory. This means that laptop ODMs* want mobos, in this case with DDR5 memory support, to test and benchmark the configurations they are selling.
That’s why today’s (paper) announcement. AMD was really announcing three Southbridges** that will be built into 600-series motherboards. These boards can be tested (mostly with engineering sample CPUs) so that they are ready when Zen 4 (Raphael) chips show up this fall: https://www.anandtech.com/show/17399/amd-ryzen-7000-announce… You can see how sparse the Ryzen 7000 announcement is. But expect AMD to ‘leak’ more details before Raphael starts shipping.
Finally, AMD swept up all the low-end laptop APU parts that came with serious demand, and put them in a new series Mendocino. Some of you may recognize the name from an Intel Celeron family a few years ago. I don’t think we are running out of city and town names, are we? https://www.anandtech.com/show/17400/amd-announces-mendocino… The series is Zen 2 family parts migrated to TSMC’s 6 nm process. AMD seems to suspect that they will get higher yields at 6 nm. I think that AMD expects to sell Mendocino well into 2025. Not everyone needs a supercomputer on their desktop. (I’m still benchmarking my new system.
Well before either process was in production fabs, I expected 7 nm and 5 nm to be stopping/resting places where parts that weren’t in the performance hunt would be fabbed. For Intel, out of necessity, that point has been 14 nm. I think they will start moving high-volume parts to 7 nm (which they are calling Intel 4) in a year or two. Trying to move many of those parts to Enhanced Superfin would be much more pain than they need. (Note that this is not about CPUs and GPUs. It is parts like network chips, where the speed is set by external standards.
- ODMs are original design makers for (mostly) laptops. They design products and sell them to OEMs without CPUs/APUs, GPUs, main memory, and storage. They ship these mostly on slow boats from China, and the OEMs sell them with lots of options. Someone at the OEM plugs your desired CPU/APU, GPU, memory, and storage in and ships it to you by air–sometimes marking the package as coming from the e-tailer you bought it from.
** Many years ago, high-end computer systems split the bus in the system into a high-speed bus (the Northbridge) and a slower bus, the Southbridge for I/O devices, mice, keyboards, etc. The Southbridge chip sat on the Northbridge bus and concentrated all those devices into one high-speed bus device. I think DEC had the first Northbridge/Southbridge architecture, but it has been a while.
Then AMD figured out that if they integrated the Northbridge chip into the CPU they could speed up communications between two CPU cores. (At that time Sledgehammer, the cores, up to eight of them were connected by what was left of the Northbridge’s fast bus, were on separate chips.) Programs that required lots of synchronization got sped up a lot. Of course, everybody and his brother made use of this fast synchronization to use multiple CPU cores in their programs.
So today, everyone (well most high-end CPU manufacturers) puts the Northbridge on the CPU chip, and the Southbridge was sitting out there alone.